Multi-chip type semiconductor device

ABSTRACT

A first semiconductor chip ( 1 ) of a high withstand voltage and a second semiconductor chip ( 2 ) of a low withstand voltage are connected to each other in a package ( 3 ). The first semiconductor chip ( 1 ) has a voltage conversion circuit ( 4 ), a plurality of first inter-chip connection portions ( 10 ) for connection to the second semiconductor chip ( 2 ), a first serial decoder ( 6 ), and external connection portions ( 13 ) for connection to the external connection terminals ( 12 ) led out of the package ( 3 ). The second semiconductor chip ( 2 ) has a second serial decoder ( 5 ) and a plurality of second inter-chip connection portions ( 11 ) for connection to the first semiconductor chip ( 1 ). Bonding wires ( 9 ) are provided which directly connect the plurality of first inter-chip connection portions ( 10 ) and the plurality of second inter-chip connection portions ( 11 ) to each other.

TECHNICAL FIELD

The present invention relates to a multi-chip-type semiconductor devicehaving a plurality of semiconductor chips packed in one package.

BACKGROUND ART

In a multi-chip-type semiconductor device in which a plurality ofsemiconductor chips are connected and resin-molded, connections betweenthe semiconductor chips are made in various forms. For example,connections between the semiconductor chips may be made by means of abonding wire. The semiconductor chips may be superposed one on anotherin a chip-on-chip structure and electrical connections between thesemiconductor chips may be made by means of bumps. Further, electricalconnections between the plurality of semiconductor chips may beestablished by joining the semiconductor chips together on a wiringsubstrate.

The reason for packing a plurality of chips in one package is that, forexample, in the case of LSI with a need for high-frequency signalprocessing and low-frequency-based processing, frequency characteristicshigh enough for high-frequency signal processing cannot be obtained ifintegration in one chip is performed by using a process forlow-frequency use, and an increase in cost results if integration in onechip is performed by using a process for high-frequency use. In such acase, semiconductor chips may have different withstand voltages andthere are various problems to be solved.

For example, a technique described in Japanese Patent Laid-Open No.2000-332193 is a solution to a problem in testing the operation of amulti-chip-type semiconductor having chips of different withstandvoltages packed in one package.

A solution to a problem relating to serial data transmission will bedescribed with reference to FIG. 6.

FIG. 6 is a block diagram showing the configuration of a conventionalmulti-chip-type semiconductor device having chips of different withstandvoltages packed in one package, i.e., a multi-chip-type semiconductordevice having a first semiconductor chip 1 and a second semiconductorchip 2 packed in a package 3. The first semiconductor chip 1 has a firstserial decoder 6 and external connection portions 13, while the secondsemiconductor chip 2 has a second serial decoder 5 and externalconnection portions 23.

A voltage source 7 is connected to a microcomputer 8 and to the firstsemiconductor chip 1. A group of serial data supplied from themicrocomputer 8 is supplied to the first semiconductor chip 1 via serialdata external connection terminals 12. The voltage of another group ofserial data supplied from the microcomputer 8 is reduced by a voltageconversion circuit 21 and the data is thereafter supplied to the secondsemiconductor chip 2 via serial data external connection terminals 22.

The groups of serial data supplied from the microcomputer 8 are outputto the first semiconductor chip 1 and the second semiconductor chip 2 inparallel with each other to control circuits in the first and secondsemiconductor chips 1 and 2.

The first semiconductor chip 1 is a high-withstand-voltage chip, whilethe second semiconductor chip 2 is a low-withstand-voltage chip. Thewithstand voltage value of the low-withstand-voltage chip is equal to orlower than the voltage value of the serial data supplied from themicrocomputer 8.

In the serial transmission system of the conventional multi-chip-typesemiconductor device shown in FIG. 6, however, serial data externalconnection terminals 22 are required to externally supply the serialdata to the low-withstand-voltage chip. The number of pins and, hence,the mount area, is increased and it is difficult to reduce the overallsize of the package. Moreover, there is a need for the external voltageconversion circuit 21 and an increase in cost results.

The present invention has been achieved in consideration of the problemof the conventional art, and an object of the present invention is toprovide a multi-chip-type semiconductor device capable of transmittingserial data while having such a configuration that the number ofexternal connection terminals is not largely increased and there is noneed for an external voltage conversion circuit.

DISCLOSURE OF THE INVENTION

The first invention in the present invention provided to achieve theabove-described object relates to a multi-chip-type semiconductor deviceincluding a first semiconductor chip and a second semiconductor chipconnected to each other in a package and has features described below.The first semiconductor chip has a voltage conversion circuit, aplurality of first inter-chip connection portions for connection to thesecond semiconductor chip, a first serial decoder, external connectionterminals led out of the package, and external connection portions forconnection to the external connection terminals. The secondsemiconductor chip has a second serial decoder and a plurality of secondinter-chip connection portions for connection to the first semiconductorchip. Bonding wires are also provided which directly connect theplurality of first inter-chip connection portions and the plurality ofsecond inter-chip connection portions to each other. The semiconductordevice is thus configured and serial data input through the externalconnection terminals is transmitted to the second serial decoder via thevoltage conversion circuit, the first inter-chip connection portions andthe second inter-chip connection portions.

The second invention in the present invention relates to amulti-chip-type semiconductor device including a first semiconductorchip and a second semiconductor chip connected to each other in apackage and has features described below. The first semiconductor chiphas a voltage conversion circuit, a plurality of first inter-chipconnection portions for connection to the second semiconductor chip, afirst internal circuit, external connection terminals led out of thepackage, and external connection portions for connection to the externalconnection terminals. The second semiconductor chip has a secondinternal circuit and a plurality of second inter-chip connectionportions for connection to the first semiconductor chip. Bonding wiresare also provided which directly connect the plurality of firstinter-chip connection portions and the plurality of second inter-chipconnection portions to each other. The semiconductor device is thusconfigured and a control signal input through the external connectionterminals is transmitted to the second internal circuit via the voltageconversion circuit, the first inter-chip connection portions and thesecond inter-chip connection portions.

In the present invention, a high voltage can be applied to the firstsemiconductor chip, and the second semiconductor chip can have awithstand voltage lower than that of the first semiconductor chip andlower that the voltage of the serial data externally applied.

Also, the first semiconductor chip and the second semiconductor chip canbe made controllable by serial data from a microcomputer.

These arrangements enable transmission of serial data and transmissionof a control signal without directly applying a high voltage to thelow-withstand-voltage chip.

According to the present invention, transmission of serial data andtransmission of a control signal can be performed without directlyapplying a high voltage to the low-withstand-voltage chip, as describedabove. Thus, the provision of a multi-chip-type semiconductor devicecapable of transmitting serial data while having such a configurationthat the number of external connection terminals is not largelyincreased and there is no need for an external voltage conversioncircuit is achieved.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing the configuration of a multi-chip-typesemiconductor device in Embodiment 1 of the present invention;

FIG. 2 is a block diagram showing the configuration of a multi-chip-typesemiconductor device in Embodiment 2 of the present invention;

FIG. 3 is a circuit diagram showing an example of a voltage conversioncircuit of the present invention;

FIG. 4 is a block diagram showing the configuration of a multi-chip-typesemiconductor device in Embodiment 3 of the present invention;

FIG. 5 is a circuit diagram showing an example of a second serialdecoder input circuit in Embodiment 3 of the present invention; and

FIG. 6 is a block diagram showing a conventional multi-chip-typesemiconductor device.

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of the present invention will be described with reference tothe drawings. In the following description, components corresponding tothose described with reference to FIG. 6 are indicated by the samereference numerals.

FIG. 1 is a block diagram showing the configuration of a multi-chip-typesemiconductor device in Embodiment 1 of the present invention. A firstsemiconductor chip 1 of a high withstand voltage and a secondsemiconductor chip 2 of a low withstand voltage are connected to eachother in a package 3.

The first semiconductor chip 1 has a voltage conversion circuit 4, aplurality of first inter-chip connection portions 10 for connection tothe second semiconductor chip 2, a first serial decoder 6, and externalconnection portions 13 for connection to external connection terminals12 led out of the package 3. The second semiconductor chip 2 has asecond serial decoder 5 and a plurality of second inter-chip connectionportions 11 for connection to the first semiconductor chip 1.

Further, bonding wires 9 are provided which directly connect theplurality of first inter-chip connection portions 10 and the pluralityof second inter-chip connection portions 11 to each other. The voltageof serial data input through the external connection terminals 12 isreduced by the voltage conversion circuit 4 and the serial data is thensupplied to the second serial decoder 5 via the first inter-chipconnection portions 10 and the second inter-chip connection portions 11.

FIG. 2 is a block diagram showing the configuration of a multi-chip-typesemiconductor device in Embodiment 2 of the present invention. A firstsemiconductor chip 1 has a voltage conversion circuit 4, a plurality offirst inter-chip connection portions 10 for connection to the secondsemiconductor chip 2, a first internal circuit 14, external connectionterminals 12 led out of the package 3, and external connection portions13 for connection to the external connection terminals 12. The secondsemiconductor chip 2 has a second internal circuit 15 and a plurality ofsecond inter-chip connection portions 11 for connection to the firstsemiconductor chip 1.

Further, bonding wires 9 are provided which directly connect theplurality of first inter-chip connection portions 10 and the pluralityof second inter-chip connection portions 11. The voltage of a controlsignal input through the external connection terminals 12 is reduced bythe voltage conversion circuit 4 and the control signal is then suppliedto the second internal circuit 15 via the first inter-chip connectionportions 10 and the second inter-chip connection portions 11.

FIG. 3 is a circuit diagram showing an example of the voltage conversioncircuit 4 in this embodiment having a power supply voltage terminal 31,a low-withstand-voltage power supply terminal 32, a serial data inputterminal 33, an output terminal 34, a GND terminal 35, a referencevoltage terminal 36, a constant-current source 37, resistors 38-1 and38-2, a PNP differential pair transistors (Tr) 39, and current mirrorcircuits 40-1 to 40-3.

The power supply voltage terminal 31 is connected to a power supply 7;the low-withstand-voltage power supply terminal 32 to a power supplyvoltage set equal to or lower than the withstand voltage of thelow-withstand-voltage chip; the serial data input terminal 33 to theserial data external connection terminal 12; and the output terminal 34to the first inter-chip connection portion 10.

The same amplitude of voltage as that of the power supply 7 is input tothe serial data input terminal 33. One of the PNP differential pairtransistors 39 is turned on or off depending on whether this amplitudeof voltage is higher or lower than a voltage applied to the referencevoltage terminal 36. Simultaneously, one of the current mirror circuits40-1 and 40-2 is turned on or off. A serial data signal having the sameamplitude value as the power supply voltage applied to thelow-withstand-voltage power supply terminal 32 is finally obtained.

The above-described arrangement is capable of transmitting serial dataand a control signal without directly applying a high voltage to thelow-withstand-voltage second semiconductor chip 2.

FIG. 4 is a block diagram showing the configuration of a multi-chip-typesemiconductor device in Embodiment 3 of the present invention. Ahigh-withstand-voltage chip 1 has a withstand voltage of 10 V and apower supply changes to 7 V at the maximum. A low-withstand-voltage chip2 has a withstand voltage of 3.6 V.

The power supply 7 is connected to a power supply 31 for a voltageconversion circuit 4 and to a power supply terminal of a 3 V regulator50. An output of the 3 V regulator 50 is connected to a power supplyterminal 53 of an input circuit of a second serial decoder 5 via anoutput-side power supply 32 of the voltage conversion circuit 4, bondingwires 9, a plurality of first inter-chip connection portions 10 and aplurality of second inter-chip connection portions 11.

Output terminals 34 of the voltage conversion circuit 4 are connected toinput terminals 54 of the input circuit of the second serial decoder 5via the bonding wires 9, the plurality of inter-chip connection portions10 and the plurality of second inter-chip connection portions 11.

FIG. 5 shows the input circuit of the second serial decoder 5 having theinput terminal 54, an output terminal 56 connected to a circuit in afollowing stage, the power supply terminal 53 and a ground terminal 55.

In the above-described arrangement, serial data having an amplitude of 7V at the maximum is voltage-converted into serial data the amplitude ofwhich is limited to 3 V, which is supplied to the low-withstand-voltagechip 2 without exceeding the withstand voltage of thelow-withstand-voltage chip 2.

INDUSTRIAL APPLICATION

The present invention is applied to a multi-chip-type semiconductordevice having a plurality of semiconductor chips packed in one packageand is implemented particularly effectively as a multi-chip-typesemiconductor device capable of transmitting serial data while havingsuch a configuration that the number of external connection terminals isnot largely increased and there is no need for an external voltageconversion circuit.

1. A multi-chip-type semiconductor device comprising a firstsemiconductor chip and a second semiconductor chip connected to eachother in a package, wherein said first semiconductor chip comprises avoltage conversion circuit, a plurality of first inter-chip connectionportions for connection to the second semiconductor chip, a first serialdecoder, external connection terminals led out of the package, andexternal connection portions for connection to the external connectionterminals, said second semiconductor chip comprises a second serialdecoder and a plurality of second inter-chip connection portions forconnection to the first semiconductor chip, bonding wires are provided,for directly connecting the plurality of first inter-chip connectionportions and the plurality of second inter-chip connection portions toeach other, and serial data input through the external connectionterminals is transmitted to the second serial decoder via the voltageconversion circuit, the first inter-chip connection portions and thesecond inter-chip connection portions.
 2. The multi-chip-typesemiconductor device according to claim 1, wherein a high voltage can beapplied to the first semiconductor chip, and the second semiconductorchip has a withstand voltage lower than that of the first semiconductorchip and lower than the voltage of the serial data externally applied.3. The multi-chip-type semiconductor device according to claim 1,wherein the first semiconductor chip and the second semiconductor chipare controlled by serial data from a microcomputer.
 4. A multi-chip-typesemiconductor device comprising a first semiconductor chip and a secondsemiconductor chip connected to each other in a package, wherein saidfirst semiconductor chip comprises a voltage conversion circuit, aplurality of first inter-chip connection portions for connection to thesecond semiconductor chip, a first serial decoder, external connectionterminals led out of the package, and external connection portions forconnection to the external connection terminals, said secondsemiconductor chip comprises a second internal circuit and a pluralityof second inter-chip connection portions for connection to the firstsemiconductor chip, bonding wires are provided for directly connectingthe plurality of first inter-chip connection portions and the pluralityof second inter-chip connection portions to each other, and a controlsignal input through the external connection terminals is transmitted tothe second internal circuit via the voltage conversion circuit, thefirst inter-chip connection portions and the second inter-chipconnection portions.
 5. The multi-chip-type semiconductor deviceaccording to claim 4, wherein a high voltage can be applied to the firstsemiconductor chip, and the second semiconductor chip has a withstandvoltage lower than that of the first semiconductor chip and lower thanthe voltage of the control signal externally applied.
 6. Themulti-chip-type semiconductor device according to claim 4, wherein thefirst semiconductor chip and the second semiconductor chip arecontrolled by control signal from a microcomputer.